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L6731DTR Arkusz danych(PDF) 11 Page - STMicroelectronics

Numer części L6731DTR
Szczegółowy opis  Adjustable step-down controller with synchronous rectification dedicated to DDR memory
PDF  23 Pages
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Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L6731DTR Arkusz danych(HTML) 11 Page - STMicroelectronics

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5.3
Bypassing the LDO to avoid the voltage drop with low Vcc
If VCC 5 V the internal LDO works in dropout with an output resistance of about 1 Ω. The
maximum LDO output current is about 100 mA and so the output voltage drop is 100 mV, to
avoid this the LDO can be bypassed.
5.4
Internal and external references
It is possible to set the internal/external reference and the switching frequency by setting the
proper voltage at the DDR-IN pin. The maximum value of the external reference is 2.5 V
(typ.):
VEAREF from 0 % to 80 % of VCCDR -> External reference/FSW = 250 kHz
VEAREF from 80 % to 95 % of VCCDR -> VREF = 0.6 V/FSW = 500 kHz
VEAREF from 95 % to 100 % of VCCDR -> VREF = 0.6 V/FSW = 250 kHz
Providing an external reference from 0V to 450mV the output voltage will be regulated but
some restrictions must be considered:
OV threshold saturates to a minimum value of 300 mV (OV is tracking the
reference; tracking small references will result in a narrow threshold reducing
noise immunity)
The under-voltage-protection doesn't work;
The PGOOD signal remains low;
To set the resistor divider it must be considered that a 100 k pull-down resistor is integrated
into the device (see Figure 5.). Finally it must be taken into account that the voltage at the
DDR-IN pin is captured by the device at the start-up when V
CC is about 4 V.
Figure 4.
Bypassing the LDO



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