STW5098T datasheet(59/86 Pages) STMICROELECTRONICS

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Timing specifications

STw5098

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Timing specifications

Information included in this section is valid for both entities.

Unless otherwise specified, VCCIO = 1.71V to 2.7V, Tamb = -30°C to 85°C, max capacitive

load 20 pF; typical characteristics are specified at VCCIO = 2.4 V, Tamb = 25 °C; all signals

are referenced to GND, see Note below figure for timing definitions.

Figure 13.

A.C. testing input-output waveform

Note:

A signal is valid if it is above VIH or below VIL and invalid if it is between VIL and VIH. For the

purpose of this specification the following conditions apply (see Figure 13 above):

a) All input signal are defined as: VIL =0.2•VCCIO, VIH =0.8•VCCIO, tR < 10ns, tF < 10ns.

b) Delay times are measured from the inputs signal valid to the output signal valid.

c) Setup times are measured from the data input valid to the clock input invalid.

d) Hold times are measured from the clock signal valid to the data input invalid.

Note:

All timing specifications subject to change.

AC Testing: inputs are driven at 0.8

•VCCIO for a logic ‘1’ and 0.2•VCCIO for a logic ‘0’.

Timing measurements are made at 0.7

•VCCIO for a logic ‘1’ and 0.3•VCCIO for a logic ‘0’.

TEST POINTS

0.7²VCCIO

0.3²VCCIO

0.7²VCCIO

0.3²VCCIO

0.8²VCCIO

0.2²VCCIO

Input/output

STW5098T Arkusz danych(PDF) 59 Page - STMicroelectronics