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STPCINDUSTRIAL Arkusz danych(PDF) 12 Page - STMicroelectronics |
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STPCINDUSTRIAL Arkusz danych(HTML) 12 Page - STMicroelectronics |
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12 / 55 page  STRAP OPTION 12/55 Issue 1.1 2.1 STRAP OPTION REGISTER DESCRIPTION 2.1.1 STRAP REGISTER 0 INDEX 4AH (STRAP0) Bits 7-0, This register reflect the status of pins MD[7:0] respectively. They are expected to be connected on the system board to the SIMM configuration pins as follows: Note that the SIMM speed and type information read here is meant only for the software and is not used by the hardware. The software must program the Host and graphics DRAM controller configuration regis- ters appropriately based on these bits. This register defaults to the values sampled on MD[7:0] pins after reset. MD 39 Reserved Pull up MD 40 PCMCIA or PCI i/f 3C,bit 0 User defined PCI PCMCIA MD 41 Local Bus or ISA i/f 3C,bit 1 User defined ISA Local Bus MD 42 Key Board & Mouse 3C,bit 2 User defined External Internal MD 43 Parallel Port 3C,bit 3 User defined External Internal MD 44 Serial Port UART1 3C,bit 4 User defined External Internal MD 45 UART2 3C,bit 5 User defined External Internal MD 46 Reserved 3C,bit 6 Pull down MD 47 Reserved 3C,bit 7 Pull down MD 48 TFT Outputs on RFU pads 3D,bit 0 User defined Disable Enable MD 49 Cardbus Socket 5V Availability 3D,bit 1 User defined Not Availa- ble Available MD 50 3.3V Availability 3D,bit 2 User defined Not Availa- ble Available MD 51 x.xV Available 3D,bit 3 User defined Not Availa- ble Available MD 52 y.yV Available 3D,bit 4 User defined Not Availa- ble Available MD 53 Reserved Pull uo MD 56 Reserved Pull up MD 57 Reserved Pull down MD 58 Reserved Pull up MD 59 Reserved Pull down Bit Sampled Description Bit 7 SIMM 0 DRAM type Bits 6-5 SIMM 0 speed Bit 4 SIMM 1 DRAM type Bits 3-2 SIMM 1 speed Bits 1-0 Reserved Memory Data Lines Refer to Designation Location Actual Settings Set to ’0’ Set to ’1’ |
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