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33911 Arkusz danych(PDF) 21 Page - Freescale Semiconductor, Inc

Numer części 33911
Szczegółowy opis  LIN System Basis Chip with DC Motor Pre-driver
PDF  45 Pages
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Producent  FREESCALE [Freescale Semiconductor, Inc]
Strona internetowa  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

33911 Arkusz danych(HTML) 21 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
Freescale Semiconductor
21
33911
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
INTERRUPT (IRQ)
The IRQ pin is a digital output used to signal events or
faults to the MCU while in Normal and Normal Request Mode
or to signal a wake-up from Stop Mode. This active low output
will transition high only after the interrupt is acknowledged by
a SPI read of the respective status bits.
WATCHDOG CONFIGURATION (WDCONF)
The WDCONF pin is the configuration pin for the internal
watchdog. A resistor can be connected to this pin to configure
the window watchdog period. When connected directly to
ground, the watchdog will be disabled. When this pin is left
open, the watchdog period is fixed to its lower precision
internal default value (150ms, typical).
GROUND CONNECTIONS (AGND, PGND, LGND)
The AGND, PGND and LGND pins are the Analog and
Power ground pins.
The AGND pin is the ground reference of the voltage
regulator.
The PGND and LGND pins are used for high-current load
return as in the relay-drivers and LIN interface pin.
Note: PGND, AGND and LGND pins must be connected
together.
LOW SIDES (LS1 AND LS2)
LS1 and LS2 are the low side driver outputs. Those
outputs are short-circuit protected and include active clamp
circuitry to drive inductive loads. Due to the energy clamp
voltage on this pin, it can raise above the battery level when
switched off. The switches are controlled through the SPI and
can be configured to respond to a signal applied to the
PWMIN input pin.
Both low side switches are protected against overheating.
DIGITAL/ANALOGS (L1 AND L2)
The Lx pins are multi purpose inputs. They can be used as
digital inputs, which can be sampled by reading the SPI and
used for wake-up when 33911 is in low-power mode or used
as analog inputs for the analog multiplexer. When used to
sense voltage outside the module, a 33kohm series resistor
must be used on each input.
When used as wake-up inputs L1 and L2 can be
configured to operate in cyclic sense mode. In this mode, the
high side switch is configured to be periodically turned on and
sample the wake-up inputs. If a state change is detected
between two cycles, a wake-up is initiated. The 33911 can
also wake-up from Stop or Sleep by a simple state change on
L1 and L2.
When used as an analog input, the voltage present on the
Lx pins are scaled down by a selectable internal voltage
divider and can be routed to the ADOUT0 output through the
analog multiplexer.
Note: If an Lx input is selected in the analog multiplexer, it
will be disabled as a digital input and remains disabled in low-
power mode. No wake-up feature is available in that
condition.
When an Lx input is not selected in the analog multiplexer,
the voltage divider is disconnected from that input.
HIGH SIDE OUTPUT (HS1)
This high side switch is able to drive loads such as relays
or lamps. Its structure is connected to the VS2 supply pin.
The pin is short-circuit protected and also protected against
overheating.
HS1 is controlled by SPI and can respond to a signal
applied to the PWMIN input pin.
The HS1 output can also be used during low-power mode
for the cyclic-sense of the wake inputs.
POWER SUPPLIES (VS1 AND VS2)
These are the battery level voltage supply pins. In
application, VS1 and VS2 pins must be protected against a
reverse battery connection and negative transient voltages
with external components. These pins sustain standard
automotive voltage conditions such as a load dump at 40V.
The high side switch (HS1) is supplied by the VS2 pin, all
other internal blocks are supplied by the VS1 pin.
VOLTAGE SENSE (VSENSE)
This input can be connected directly to the battery line. It
is protected against a battery reverse connection. The
voltage present on this input is scaled down by an internal
voltage divider, and can be routed to the ADOUT0 output pin
and used by the MCU to read the battery voltage.
The ESD structure on this pin allows for excursion up to
+40V and down to -27V, allowing this pin to be connected
directly to the battery line. It is strongly recommended to
connect a 10kohm resistor in series with this pin for protection
purposes.
+5V MAIN REGULATOR OUTPUT (VDD)
An external capacitor must be placed on the VDD pin to
stabilize the regulated output voltage. The VDD pin is
intended to supply a microcontroller. The pin is current limited
against shorts to GND and over-temperature protected.
During Stop Mode, the voltage regulator does not operate
with its full drive capabilities and the output current is limited.
During Sleep Mode the regulator output is completely shut
down.



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