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HD74LS164 Arkusz danych(PDF) 6 Page - Renesas Technology Corp |
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HD74LS164 Arkusz danych(HTML) 6 Page - Renesas Technology Corp |
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6 / 9 page ![]() HD74LS164 Rev.2.00, Feb.18.2005, page 6 of 8 Waveform Clock Clear 1.3V 1.3V 1.3V 1.3V 1.3V 1.3V 1.3V 1.3V 1.3V 1.3V 1.3V 1.3V tTHL tw (CLR) ≥ 20ns tw (CK) ≥ 20ns tTHL tTLH tTHL tsu th tsu th tTLH tTLH QA A tPHL tPHL tPLH VOH VOL 0V 3V 0V 3V 0V 3V 10% 10% 10% 10% 10% 10% 90% 90% 90% 90% 90% 90% Notes: 1. Input pulse; tTLH ≤ 15 ns, t THL ≤ 6 ns, PRR = 1 MHz, (Clock, Clear), PRR = 500 kHz (A or B) 2. QA output is illustrated. Relationship of serial input A and B data to other Q outputs is illustrated in the timing chart. |
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