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M3882 Arkusz danych(PDF) 39 Page - Renesas Technology Corp |
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M3882 Arkusz danych(HTML) 39 Page - Renesas Technology Corp |
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39 / 62 page ![]() Rev.1.01 Nov 14, 2005 page 39 of 60 REJ03B0089-0101 3882 Group Fig. 31 Block diagram of serialized interrupt Clock monitor control circuit Serialized interrupt request control circuit Internal data bus Serialized IRQ control register Serialized IRQ request register b7 b6 b5 b4 b3 b2 b1 b0 LCLK Serialized IRQ request Frame number Serialized interrupt control circuit IRQx frame number OBF interrupt control Clock stop inhibition enable and clock restart enable OBF0 – OBF1 Clock operation status and finish acknowledgement Clock restart request and start frame activate request CLKRUN# SERIRQ LRESET# CPU clock φ Software Serialized IRQ request b7 b6 b5 b4 b3 b2 b1 b0 Serialized IRQ enable * Open Drain * |
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