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STV9425 Arkusz danych(PDF) 9 Page - STMicroelectronics

Numer części STV9425
Szczegółowy opis  MULTISYNC ON-SCREEN DISPLAY FOR MONITOR
PDF  15 Pages
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Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STV9425 Arkusz danych(HTML) 9 Page - STMicroelectronics

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FUNCTIONAL DESCRIPTION (continued)
H-SYNC
0123
n + 1
n + 2
n + 3
n + 4
LD - 1
LD
01
Character
Period
R, G, B
LD[5:0]
Fixed
DD[7:0]
= 4 (min)
= 4n + 2
Given by number
of characters of the strips
Figure 5 : Horizontal Timing
IV - Clock and Timing
The whole timing is derived from the XTALIN and
the SYNCHRO (horizontal and vertival) input fre-
quencies. The XTALIN input frequency can be an
exte rnal clock or a crystal signal thanks to
XTALIN/XTALOUT pins. The value of this fre-
quency can be chosen between 8 and 15MHz, it is
available on the CKOUT pin and is used by the PLL
to generate a pixel clock locked on the horizontal
synchro input signal.
IV.1 - Horizontal Timing (see Figure 5)
The number of pixel periods is given by the LINE
DURATION register and is equal to :
[LD[5:0] + 1 ] x 12.
(LD[5:0] : value of the LINE DURATION register).
This value allows to choose the horizontal size of
the characters. The horizontal left margin is given
by the HORIZONTAL DELAY register and is equal
to :
[DD[7:0] + 8] x 3 x TPXCK
(DD[7:0] : value of the DISPLAY DELAY register
and TPXCK : pixel period).
This value allows to choose the horizontal position
of the characters on the screen. The value of
DD[7:0] must be equal or greater than 4 (the mini-
mum value of the horizontal delay is 36 x TPXCK =3
character periods). The length of the active area,
where R, G, B are different from 0, dependson the
number of characters of the strips.
IV.2 - D to A Timing
The D to A converters of the STV9425/25B/26are
pulse width modulater converter. The frequency of
the output signal is :
FXTAL
256
and the duty cycle is :
Vi[7:0]
256
per cent.
After a low pass filter, the average value of the
output is :
Vi
[7:0]
256
VDD
V - Display Control
A screen is composed of successive scanlines gath-
ered in several strips. Each strip is defined by a
descriptor stored in memory. A table of descriptors
allows screen composition and different tables can
be stored in memory at thepage addresses(8 pos-
sible
≠ addresses).Two typesof stripsareavailable :
- Spacing strip : its descriptor (see II) gives the
number of black (FBK = 1 in DISPLAYCONTROL
register) or transparent (FBK = 0) lines.
- Character strip : its descriptor gives the memory
address of the character codes corresponding to
the 1
st displayed character. The characters and
attributes (see code format III) are defined by a
succession of codes stored in the RAM at ad-
dresses starting from the 1
st one given by the
descriptor. A character strip can be displayed or
not by using the DE bit of its descriptor. A zoom
can be made on it by using the ZY bit.
0
1
128
255
V1[7:0]
TXTAL
256 . TXTAL
PWM1 Signal
Figure 6 : PWM Timing
STV9425 - STV9425B - STV9426
9/15



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