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H8SX/1663M Arkusz danych(PDF) 1265 Page - Renesas Technology Corp |
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H8SX/1663M Arkusz danych(HTML) 1265 Page - Renesas Technology Corp |
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1265 / 1504 page ![]() Section 27 Clock Pulse Generator Rev. 2.00 Sep. 24, 2008 Page 1233 of 1468 REJ09B0412-0200 Figure 27.11 shows the external circuitry recommended for the PLL circuit. Separate PLLVcc and PLLVss from the other Vcc and Vss lines at the board power supply source, and be sure to insert bypass capacitors CPB and CB close to the pins. PLLVCC PLLVSS VCC VSS Rp: 100 Ω CPB: 0.1 µF* CB: 0.1 µF* Note: * CB and CPB are laminated ceramic capacitors. Figure 27.11 Recommended External Circuitry for PLL Circuit |
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