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7721 Arkusz danych(PDF) 74 Page - Renesas Technology Corp |
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7721 Arkusz danych(HTML) 74 Page - Renesas Technology Corp |
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74 / 577 page ![]() 7721 Group User’s Manual RESET 4–11 4.1.3 Internal processing sequence after reset Figure 4.1.10 shows the internal processing sequence after reset. 4.1 Hardware reset Fig. 4.1.10 Internal processing sequence after reset (Next op-code or operand) “H” CPU A0–A7 A8/D8–A15/D15 FE16 ADL E R/W qExternal bus width = 16 bits (BYTE = “L”) ADH (ADH) 0016 FF16 0016 0016 (Next op-code) A16/D0–A23/D7 0016 (ADL) 0016 0016 0016 ALE “H” CPU A0–A7 FE16 ADL E R/W 0016 A16/D0–A23/D7 0016 (ADH) 0016 0016 0016 ALE FF16 A8–A15 FF16 ADH 0016 FF16 0016 (ADL) qExternal bus width = 8 bits (BYTE = “H”) (Next op-code) |
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