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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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7721 Arkusz danych(PDF) 174 Page - Renesas Technology Corp |
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7721 Arkusz danych(HTML) 174 Page - Renesas Technology Corp |
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174 / 577 page  7721 Group User’s Manual TIMER B 9–7 9.2.5 Port P5 direction register Input pins of Timer Bj are multiplexed with port P5. When using these pins as Timer Bj’s input pins, set the corresponding bits of the port P5 direction register to “0” to set these port pins for the input mode. Figure 9.2.5 shows the relationship between port P5 direction register and the Timer Bj’s input pins. 9.2 Block description Fig. 9.2.5 Relationship between port P5 direction register and Timer Bj’s input pins 0 1 2 3 4 5 6 7 TA2OUT pin pin TA3OUT pin TA4OUT TB0 Por t P5 direction register (Address D16) b1 b0 b2 b3 b4 b5 b6 b7 TA2I I N RW 0 0 0 0 0 0 0 0 : Bits 0 to 5 are not used for Timer B. Corresponding pin name Functions Bit At reset 0 : Input mode 1 : Output mode When using these pins as Timer Bj's input pins, set the corresponding bits to "0 ." RW RW RW RW RW RW RW RW pin TA3 N pin I TA4 N pin IN pin TB1IN pin |
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