Stereodecoder Adjustment

MSB

LSB

FUNCTION

D7

D6

D5

D4

D3

D2

D1

D0

0

0

0

:

1

:

1

0

0

1

:

0

:

1

0

1

0

:

0

:

1

Roll-Off Compensation

not allowed

20.2%

21.9%

:

25.5%

:

31.0%

0

0

0

:

1

0

0

0

:

1

0

0

1

:

1

0

1

0

:

1

LEVEL Gain

0dB

0.66dB

1.33dB

:

10dB

0

1

Temperature compensation at LEVEL inpu t

TC = 0

TC = 16.7mV/K (3300ppm)

Testing

MSB

LSB

FUNCTION

D7

D6

D5

D4

D3

D2

D1

D0

0

1

Stereodecoder test signals

OFF

Test signals enabled if bit D5 of the subaddress

(test mode bit) is set to ”1”, too

0

1

External Clock

Internal Clock

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

0

0

0

0

1

1

1

1

0

0

0

0

1

1

1

1

0

0

1

1

0

0

1

1

0

0

1

1

0

0

1

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

Testsignals at CASS_R

VHCCH

Level intern

Pilot magnitude

VCOCON; VCO Control Voltage

Pilot threshold

HOLDN

NB threshold

F228

VHCCL

VSBL

not used

not used

PEAK

not used

REF5V

not used

0

1

VCO

OFF

ON

0

1

Audio processor test mode

only if bit D5 of the subaddress

(test mode bit) is set to ”1”

OFF

Note : This byte is used fortesting or evaluation purposes only and must not be set to other values than the default ”11111110” in the application!

TDA7403

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