USBUFxxW6

6/9

Fig. A7: Remaining voltage at both stages S1 (Vinput) and S2 (Voutput) during ESD surge.

Vin

Vout

a. Positive surge

b.Negative surge

Vin

Vout

Please note that the USBUFxxW6 is not only acting for positive ESD surges but also for negative ones. For

these kinds of disturbances it clamps close to ground voltage as shown in Fig. A7b.

The early ageing and destruction of IC’s is often due to latch-up phenomenon which is mainly induced by

dV/dt. Thanks to its structure, the USBUFxxW6 provides a high immunity to latch-up phenomenon by

smoothing very fast edges.

LATCH-UP PHENOMENA

CROSSTALK BEHAVIOR

Line 1

Line 2

DRIVERS

RECEIVERS

αβ

1G1

12G2

V+

V

αβ

2G2

21G1

V+

V

Fig. A8: Crosstalk phenomenon

The crosstalk phenomenon is due to the coupling between 2 lines. The coupling factor (

creases when the gap across lines decreases, particularly in silicon dice. In the example above the ex-

phenomenon has to be taken into account when the drivers impose fast digital data or high frequency ana-

log signals in the disturbing line. The perturbed line will be more affected if it works with low voltage signal

or high load impedance (few k

Ω).