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SC810 Arkusz danych(PDF) 12 Page - Semtech Corporation |
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SC810 Arkusz danych(HTML) 12 Page - Semtech Corporation |
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12 / 19 page ![]() © 2008 Semtech Corporation SC810 12 Termination When the battery voltage reaches V CV, the SC810 transi- tions from constant current regulation to constant voltage regulation. While V BAT is regulated to V CV , the current into the battery decreases as the battery becomes fully charged. When the output current drops below the termi- nation current threshold, fixed at 10% of the programmed fast-charge current, charging terminates. Upon termina- tion, the STATB pin open drain output turns off and the charger either enters monitor state or float-charges the battery, depending on the logical state of the ENB input pin. Charger output current is the sum of the battery charge current and the system load current. Battery charge current changes gradually, and establishes a slowly dimin- ishing lower bound on the output current while charging in CV mode. The load current into a typical digital system is highly transient in nature. Charge cycle termination is detected when the sum of the battery charging current and the greatest load current occurring within the imme- diate 300μs to 550μs past interval is less than the programmed termination current. This timing behavior permits charge cycle termination to occur during a brief low-load-current interval, and does not require that the longer interval average load current be small. Termination current threshold accuracy is dominated by offset error. The range of expected termination current Applications Information (continued) versus programming resistance is shown in Figures 3a and 3b. The figures show the nominal termination current versus nominal R IPRGM resistance as the center plot and two theoretical limit plots indicating maximum and minimum current versus nominal programming resis- tance. These plots are derived from models of the expected worst-case contribution of error sources depending on programmed current. The current range includes the uncertainty due to a 1% tolerance resistor. The dots on each plot indicate the currents obtained with standard value 1% tolerance resistors. Figures 3a and 3b show low and high resistance ranges, respectively. Enable Input The ENB pin is a tri-level logical input that allows selec- tion of the following behaviors: charging enabled with float-charging after termination (ENB = low range) charging enabled with float-charging dis- abled and battery monitoring at termina- tion (ENB = mid range) charging disabled (ENB = high range). It is designed to interface to a processor GPIO port powered from a peripheral supply voltage as low as 1.8V or as high as a fully charged battery. While a connected GPIO port is configured as an output, the processor writes 0 to select ENB low-range, and 1 to select high-range. 22.5 33.5 44.5 55.5 66.5 7 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100 105 110 115 R IPRGM (kΩ), R-tol = 1% Figure 3a — Termination Current Tolerance versus Programming Resistance, Low Resistance Range 7 8 9 10 11121314 15161718 19202122 232425 26272829 0 5 10 15 20 25 30 35 R IPRGM (kΩ), R-tol = 1% Figure 3b — Termination Current Tolerance versus Programming Resistance, High Resistance Range |
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