LTC4253AIGN-ADJ datasheet(21/32 Pages) LINER

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LTC4253A-ADJ

4253a-adjf

The analog current limit loop cannot control this current

flow and therefore the loop undershoots. This effect

cannot be eliminated by frequency compensation. A zener

diode is required to clamp the input supply voltage and

prevent MOSFET avalanche.

APPLICATIO S I FOR ATIO

Actual board evaluation showed that CSS = 100nF was

appropriate. The ratio (RSS • CSS) to tCL(CHARGE) is a good

gauge as large ratios may result in the time-out period

expiring prematurely. This gauge is determined empiri-

cally with board level evaluation.

SUMMARY OF DESIGN FLOW

To summarize the design flow, consider the application

shown in Figure 1. It was designed for 80W and CL = 100µF.

Calculate maximum load current: 80W/43V = 1.86A;

allowing for 83% converter efficiency, IIN(MAX) = 2.2A.

Calculate RS: from Equation 9 RS = 20mΩ.

Calculate ISHORT-CIRCUIT(MAX): from Equation 11

ISHORTCIRCUIT(MAX) = 3.3A.

Select a MOSFET that can handle 3.3A at 71V: IRF530S.

Calculate CT: from Equation 14 CT = 383nF. Select

CT = 680nF, which gives the circuit breaker time-out

period tMAX = 5.9ms.

Consult MOSFET SOA curves: the IRF530S can handle

3.3A at 100V for 8.3ms, so it is safe to use in this

application.

Calculate CSS:usingEquations15and16selectCSS = 33nF.

FREQUENCY COMPENSATION

The LTC4253A-ADJ typical frequency compensation net-

work for the analog current limit loop is a series RC (10Ω)

and CC connected from GATE to VEE. Figure 6 depicts the

relationship between the compensation capacitor CC and

the MOSFET’s CISS. The line in Figure 6 is used to select a

starting value for CC based upon the MOSFET’s CISS

specification. Optimized values for CC are shown for

several popular MOSFETs. Differences in the optimized

value of CC versus the starting value are small. Neverthe-

less, compensation values should be verified by board

level short-circuit testing.

As seen in Figure 5, at the onset of a short-circuit event, the

input supply voltage can ring dramatically due to series

inductance. If this voltage avalanches the MOSFET, cur-

rent continues to flow through the MOSFET to the output.

Figure 6. Recommended Compensation

Capacitor CC vs MOSFET CISS

MOSFET CISS (pF)

4253A F06

2000

4000

6000

8000

IRF530S

IRF540S

IRF740

IRF3710

NTY100N10

SENSE RESISTOR CONSIDERATIONS

For proper circuit breaker operation, Kelvin-sense PCB

connections between the sense resistor and the LTC4253A-

ADJ’s VEE and SENSE pins are strongly recommended.

The drawing in Figure 7 illustrates the correct way of

making connections between the LTC4253A-ADJ and the

sense resistor. PCB layout should be balanced and sym-

metrical to minimize wiring errors. In addition, the PCB

layout for the sense resistor should include good thermal

management techniques for optimal sense resistor power

dissipation.

Figure 7. Making PCB Connections to the Sense Resistor

CURRENT FLOW

FROM LOAD

CURRENT FLOW

TO –48V BACKPLANE

SENSE RESISTOR

TRACK WIDTH W:

0.03" PER AMP

ON 1 OZ COPPER

SENSE

VEE

4253A F07

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