3

MUlTIPROTOCO l XFP O PTICA l TRANSCEI vER

—1310 NM FOR UP TO 10 KM REACH

Receiver

The receiver converts incoming DC balanced serial NRZ optical data from line

rate of 9.95 to 11.35 Gbps into serial XFI electrical data. Light is coupled to a PIN

photodetector from single-mode optical fiber through an industry-standard LC

optical connector. The electrical current from the PIN photodetector is converted

to a voltage in a high-gain transimpedance amplifier.

The amplified signal is passed to a signal conditioning IC that provides clock and

data recovery. The receive CDR function generates a clock that is at the same fre-

quency as the incoming data bit rate of the optical data input. The clock is phase

aligned by a PLL that samples the data in the center of the data eye pattern. The

CDR function does not require a reference clock to “lock” to incoming data. The

CDR contains a lock detect circuit that indicates successful locking of the PLL onto

the incoming data. Loss of signal, and signal lock detection is included in the re-

ceive circuitry that is reflected in the Mod_NR status pin. The recovered data is

output on the RD+ and RD- pins as a 100 Ω 340 mV peak-to-peak CML signal.

The output signal meets the XFP MSA requirements.

Figure 1

JDSU 10 Gbps 1310 nm multiprotocol XFP optical transceiver functional block diagram

CDR / Limiting

Amplifier

RD-

RD+

TIA

ROSA

CDR / Equalizer

TD-

TD+

TOSA

Laser Control

Circuit

Micro-

Processor

Power Supply Sequence /

In Rush Control Circuit

No Connect

GND

Transceiver Ground

MOD_ABS

GND

REFCLK+

REFCLK-

RX_LOS

MOD_NR

INTERRUPT

SDA

SCL

MOD_DESEL

TX_DIS

PDOWN/RST