TLV5619

2.7 V TO 5.5 V 12-BIT PARALLEL DIGITAL-TO-ANALOG CONVERTER

WITH POWER DOWN

SLAS172C – DECEMBER 1997 – REVISED APRIL 2000

1

POST OFFICE BOX 655303

±1.5 LSB Integral Nonlinearity (INL)

– 8 mW for 5-V Supply

– 4.3 mW for 3-V Supply

applications

Controls

description

The TLV5619 is a 12-bit voltage output DAC with

a

microprocessor

and

TMS320

compatible

parallel interface. The 12 data bits are double

buffered so that the output can be updated

asynchronously using the LDAC pin. During

normal operation, the device dissipates 8 mW at

a 5-V supply and 4.3 mW at a 3-V supply. The

power consumption can be lowered to 50 nW by

setting the DAC to power-down mode.

The output voltage is buffered by a

×2 gain

rail-to-rail amplifier, which features a Class A

output stage to improve stability and reduce

settling time.

AVAILABLE OPTIONS

PACKAGE

TA

SMALL OUTLINE

(DW)

TSSOP

(PW)

0

°C to 70°C

TLV5619CDW

TLV5619CPW

–40

°C to 85°C

TLV5619IDW

TLV5619IPW

–40

°C to 125°C

TLV5619QDW

—

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Copyright

© 2000, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

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2

3

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5

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8

9

10

20

19

18

17

16

15

14

13

12

11

D2

D3

D4

D5

D6

D7

D8

D9

D10

D11

D1

D0

CS

WE

LDAC

PD

GND

OUT

REFIN

DW OR PW PACKAGE

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