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TMS320 Arkusz danych(PDF) 39 Page - Texas Instruments

Numer części TMS320
Szczegółowy opis  SECOND-GENERATION DIGITAL SIGNAL PROCESSORS
PDF  69 Pages
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Producent  TI [Texas Instruments]
Strona internetowa  http://www.ti.com
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TMS320 Arkusz danych(HTML) 39 Page - Texas Instruments

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PARAMETER
UNIT
TMS320C25-50
SPRS010B — MAY 1987 — REVISED NOVEMBER 1990
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77001
39
SERIAL PORT TIMING
switching characteristics over recommended operating conditions (see Note 3)
PARAMETER
MIN
TYP
MAX
UNIT
td(CH-DX)
DX valid after CLKX rising edge (see Note 18)
75
ns
td(FL-DX)
DX valid after falling edge (TXM = 0, see Note 18)
40
ns
td(CH-FS)
FSX valid after CLKX raising edge (TXM = 1)
40
ns
NOTES: 3. Q = 1/4 tc(C)
18. The last occurrence of FSX falling and CLKX rising.
timing requirements over recommended operating conditions (see Note 3)
MIN
NOM
MAX
UNIT
tc(SCK)
Serial port clock (CLKX/CLKR) cycle time †
160
ns
tf(SCK)
Serial port clock (CLKX/CLKR) fall time
25 ‡
ns
tr(SCK)
Serial port clock (CLKX/CLKR) rise time
25 ‡
ns
tw(SCK)
Serial port clock (CLKX/CLKR) low or high pulse duration (see Note 19)
64
ns
tsu(FS)
FSX or FSR setup time before CLKX, CLKR falling edge (TXM = 0)
5
ns
th(FS)
FSX or FSR hold time before CLKX, CLKR falling edge (TXM = 0)
10
ns
tsu(DR)
DR setup time before CLKR falling edge
5
ns
th(DR)
DR hold time after CLKR falling edge
10
ns
† The serial port was tested at a minimum frequency of 1.25 MHz. However, the serial port was fully static but will properly function down to
fsx = 0 Hz.
‡ Value derived from characterization data and not tested.
NOTES: 3. Q = 1/4 tc(C)
19. The cycle of the serial port must be within 40%-60%.
CONTRAST SUMMARY OF ELECTRICAL SPECIFICATIONS
The following table presents electrical parameters which differ between TMS320C25 (40 MHz, 100 ns) and
TMS320C25-50 (50 MHz, 80 ns).
clock characteristics and timing
TMS320C25
TMS320C25-50
MIN
TYP
MAX
MIN
TYP
MAX
tc(SCK)
97.7
597
78.13
597
ns
td(CIH-C)
5
30
12
27
ns
tf(C)
5
4
ns
tr(C)
5
4
ns
tw(CL)
2Q – 8
2Q
2Q + 8
2Q – 7
2Q + 3
ns
tw(CH)
2Q – 8
2Q
2Q + 8
2Q – 3
2Q + 7
ns
td(C1-C2)
Q – 5
Q
Q + 5
Q – 6
Q + 2
ns
tsu(S)
5
Q – 5
4
Q – 4
ns
th(S)
8
4
ns



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