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SPT9110 Arkusz danych(PDF) 2 Page - Cadeka Microcircuits LLC. |
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SPT9110 Arkusz danych(HTML) 2 Page - Cadeka Microcircuits LLC. |
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2 / 11 page ![]() 2 11/12/98 SPT9110 ELECTRICAL SPECIFICATIONS AVCC = +5.0 V, AGND = 0.0 V, Output Load = 1 kΩ and 10 pF, VIN = 2.0 Vp-p,Internal Reference, unless otherwise specified. TEST TEST SPT9110 PARAMETERS CONDITIONS LEVEL MIN TYP MAX UNITS DC Performance Gain ∆VIN = 2.0 Vp-p Single Ended Out +25 °C I 0.95 0.97 0.99 V/V Full Temperature V 0.96 V/V Differential Out +25 °C I 1.80 1.93 2.00 V/V Full Temperature V 1.92 V/V Offset VIN = +2.5 V Out+ +25 °C I -100 ±50 +100 mV Full Temperature V 55 mV Differential1 +25 °C, Ref In=Out+ CM I -15 ±5 ±15 mV Full Temperature V 10 mV Output Drive Capacity2 Full Temperature IV ±1 ±10 mA Output Load at 10 pF Full Temperature V 1 k Ω Analog Input/Output Output Voltage Range Full Temperature VI 1.5 3.5 V Input Capacitance +25 °CV 5 pF Input Resistance +25 °C I 100 140 k Ω Reference Voltage Output I 2.35 2.45 2.55 V Reference Output Current3 +25 °CV ±100 µA Reference Voltage Tempco Full Temperature V 75 ppm/ °C Clock Inputs Input Type/Logic Family V Differential PECL Input Bias Current +25 °CI 2 10 µA Input Low Voltage (Differential) +25 °C I 3.3 3.5 V Input High Voltage (differential) +25 °C I 3.9 4.1 V ABSOLUTE MAXIMUM RATING (Beyond which damage may occur)1 Note 1: Operation at any Absolute Maximum Ratings is not implied. See Electrical Specifications for proper nominal applied conditions in typical application. Note 2: Outputs are short circuit protected. Output Currents2 Continuous Output Current ................................. ±15 mA Temperature Operating Temperature .............................. -40 to +85 °C Junction Temperature ......................................... +150 °C Lead, Soldering (10 seconds) ............................. +220 °C Storage ..................................................... -65 to +150 °C Supply Voltages AVCC Supplies ............................................. -0.5 to +6 V Input Voltages Analog Input Voltage .................................... -0.5 to +6 V CLK, NCLK Input .......................................... -0.5 to +6 V Ref In ............................................................ -0.5 to +6 V 1Differential offset is specified with Ref In equal to the common mode output voltage of OUT+ and so includes the offset error of the inverter only. 2This part is intended to drive a high impedance load. AC performance is degraded at ±10 mA. See the Typical Performance Graphs. 3Ref Out has a typical output impedance of 1 k Ω and should be buffered for driving loads other than Ref In. |
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