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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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SC441AEVB Arkusz danych(PDF) 14 Page - Semtech Corporation |
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SC441AEVB Arkusz danych(HTML) 14 Page - Semtech Corporation |
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14 / 20 page  SC441A 4 © 2009 Semtech Corporation www.semtech.com Applications Information (continued) tap connected to OVPIN. Note: If this disconnect function is not desired, bypass the OVPRTN pin and connect the end of the OVP resistor divider directly to GND. The OVPIN pin is sensitive to noise, and a proper decoupling capacitor (nF ~ 0nF) is required. The combined impedance of the resistor divider for OVPIN should be greater than 200kΩ. LED Short-Circuit Protection If one or more LEDs are detected as short-circuit, that string will be latched off. Voltage is monitored if it exceeds 2.35V on the internal LED current source (IO pins). (The IO voltage on an abnormal LED string will rise earlier than other normal LED strings). If the voltage exceeds 2.35V on any IO pin, the IO current source will latch off and the FFLAG will go high. The latch is reset if VIN falls below UVLO or it will recycle the EN signal. Other LED strings operate normally. If all IO pin voltages reach .07V then the internal main switch will be off until any of the IO voltages is lower than 970mV. LED Open-Circuit Protection If any LED string is detected as an open-circuit, that string will latch off. If any given string is open, the IO current source will go to deep saturation; the COMP and FFLAG pins will be driven high and the boost converter duty cycle will increase causing VOUT to rise. At some point VOUT will rise high enough to cause all the IO pin voltages of the intact strings to reach the shorted LED detection level and latch off those strings. Because of the LED open string VOUT will continue to rise until it reaches the programmed OVP level. When OVP is reached, the voltage on the IO pins are monitored and if any IO voltage is less than 0.2V that string will be identified as open and will latch off. Only when VIN falls below UVLO, or an EN signal is re- cycled, and if thermal shutdown occurs, can this latch be reset. A hiccup cycle is then initiated and the SS pin is discharged slowly with a µA current source and a 0.9mA discharge path (turned on to pull down VOUT). When SS falls below 0.5V and VOUT falls below to VIN, the shorted LED detection latches are reset and a new soft-start se- quence is initiated to resume normal operation. Thermal Shutdown (TSD) If the thermal shutdown temperature of 50°C is reached, a hiccup sequence is initiated where the boost converter and all IO current sources are turned off. SS is discharged by a µA current source, and a 0.9mA discharge path is turned on to pull down VOUT. As temperature falls below the TSD trip point, SC44A will retry when SS falls below 0.5V and VOUT falls to VIN. PWM Dimming ThePWMinputneedstobeheldhighfornormaloperation. PWM dimming can be done by cycling the PWM input at a given frequency where a“low”on the PWM input turns off all IO current sources and a “high” turns on all IO current sources. The short and open detection latches are blanked for approximately 2µs as the PWM input transitions from low-to-high to prevent a false fault detection during PWM dimming. The PWM pin can be toggled by external circuitry to allow PWM dimming. In a typical application, a microcontroller sets a register – or counter, that varies the pulse-width on a GPIO pin. The SC44A allows dimming over two decades in frequency (50Hz–50kHz), in order to allow compatibility with a wide range of devices, including the newest dimming strategies that avoid the audio band by using high frequency PWM dimming. In this manner, a wide range of illumination can be generated while keeping the instantaneous LED current at its peak value for luminescent efficiency and color purity. Furthermore, advanced lighting effects such as backlight dim-on can be implemented as the SC44A can resolve 0µs (minimum), PWM dimming pulse-width. As far as the maximum PWM dimming pulse-width, it depends on the PWM dimming frequency. Clearly, it is trivial to get 00% LED brightness by pulling PWM pin “High” constantly. When the user tries to dim the LED brightness using PWM signal from 00% down, he or she needs to observe the following. When the PWM dimming signal is actively switching from “High” to “Low” and to “High”, there is a minimal OFF time (T_off_min, 200ns, guaranteed by design) requirement of the PWM dimming signal with this IC. Such minimal OFF time sets the maximum PWM duty ratio before hitting to 00% in the following way. For example, if the PWM dimming frequency f_ PWM=200Hz, the D_max=99.996%. If f_PWM=25kHz, the D_max=99.5%. With most practical dimming interfaces, PWM off f T D min _ max 1 |
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