AS28F128J3MRG

Austin Semiconductor, Inc. reserves the right to change products or modify product specifications with appropriate notification

Revision 5.0 11/23/04

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3

PEM

AS28F128J3M

Austin Semiconductor, Inc.

Q-Flash

Signal Name

Symbol

Type

Pin

Description

Address

A0, A1, A2. A3,

Input

32,28,27,26,

Address Inputs during READ and WRITE Operations. A0 is only

A4, A5, A6, A7

25,24,23,22,

used in x8 mode and will be a NC in x16 mode.

A8, A9, A10, A11

20,19,18,17,

A12,A13,A14,A15

13,12,11,10,

A16,A17,A18,A19

8,7,6,5,

A20,A21,A22,A23

4,3,1,30

Chip Enables

CE0, CE1, CE2

Input

14,2,29

Three Chip Enable pins for Multiple devices. See chart for function

Write Enable

WE\

Input

55

Write Control

Reset/Power-Down

RP\

Input

16

Reset/Power-Down, When Low the control pin resets the status Reg.

and ISM to array READ mode.

Output Enable

OE\

Input

54

Ouput Enable control enable data output buffers when Low, and when

High the output buffers are disabled

Byte Mode Control

BYTE\

Input

31

Configuration Control pin. When High the device is in x16 mode, when

Low the device is in Byte mode (x8)

Programming Voltage

VPEN

Input

15

Necessary Voltage pin for Programming, Erasing or configuring lock

bits. Typically connected to VCC. When VPEN</=VPENLK, this

enables Hardware Write Protect.

Status Pin/Flag

STS

Output

53

Indicates the status of the ISM. When configured in level mode, STS

acts as a RY/BY\ pin. When configured in its pulse mode, it can

pulse to indicate PROGRAM and or ERASE completion.

Input/Output Voltage

VCCQ

Supply

43

Separate/Isolated Voltage supply for Input/Output bus. Allows

voltage matching to different interface standards.

Supply Voltage

VCC

Supply

9, 37

Power Supply: 2.7V - 3.6V

Digital Ground

GND

Supply

21, 42, 48

Ground

No Connect(s)

NC

-

1, 30, 56

No electrical connection or function

Capacitance

Parameter/Condition

Symbol

Typ

Max

Units

Input Capacitance

Cin

5

8

pF

Output Capacitance

Cbyte

14

16

pF

Cout

5

12

pF

Three Chip Enable (CEx) pins are used for enabling and disabling

the device by activating the device’s control logic, input buffer,

decoders, and sense amplifiers.

BYTE\ enables the device to be used in x8 or x16 configuration.

Byte=Low (logic 0) selects and 8-bit mode with address zero (A0)

selecting the High or Low Byte and Byte=High (logic 1) selects

the 16-bit or Word mode. When the device is in Word mode,

address one (A1) becomes the low order address bit and address

zero (A0) becomes a no-connect (NC).

RP\ is used to reset the device. When the device is disabled and

RP\ is at VCC, the STANDBY mode is enabled. A reset time

(tRWH) is required after RP\ switches to a High (logic 1) and the

outputs become valid. Likewise, the device has a wake time (tRS)

from RP\ High until WRITES to the Command User Interface

[CUI] are recognized, RESETS the ISM and clears the status

register.

Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may

cause permanent damage to the device. This is a stress rating only and functional

operation of the device at these or any other conditions greater than those

indicated in the operational sections of this specification is not implied. Exposure

to absolute maximum conditions for any duration or segment of time may affect

device reliability.

Pin Description Table:

Chip Enable Truth Table

CE2

CE1

CE0

Device

VIL

VIL

VIL

Enabled

VIL

VIL

VIH

Disabled

VIL

VIH

VIL

Disabled

VIL

VIH

VIH

Disabled

VIH

VIL

VIL

Enabled

VIH

VIL

VIH

Enabled

VIH

VIH

VIL

Enabled

VIH

VIH

VIH

Disabled

Absolute Maximum Ratings

Voltage

Min

Max

Units

Notes

Temperature under

-55

125

Bias

Storage Temperature

-65

125

For VCCQ=2.7v to 3.6v

-2

5

V

Voltage on any pin

Short Circuit Current

100

mA

1

Notes

1: All specified voltages are with respect to GND. Minimum DC

voltage is -0.5v on input/output pins and -0.2v on Vcc and VPEN

pins. During transitions, this level may undershoot to -2.0v for

periods </= 20ns. Maximum DC voltage on input/output pins,

Vcc and VPEN is VCC+0.5V which, during transitions, may

overshoot to Vcc + 2.0v for periods <20ns.