MCP621 datasheet(19/44 Pages) MICROCHIP

19 / 44 page

DS22188A-page 19

MCP621/2/5

3.0

PIN DESCRIPTIONS

Descriptions of the pins are listed in Table 3-1.

TABLE 3-1:

PIN FUNCTION TABLE

3.1

Analog Outputs

The analog output pins (VOUT) are low-impedance

voltage sources.

3.2

Analog Inputs

The non-inverting and inverting inputs (VIN+, VIN–, …)

are high-impedance CMOS inputs with low bias

currents.

3.3

Power Supply Pins

The positive power supply (VDD) is 2.5V to 5.5V higher

than the negative power supply (VSS). For normal

operation, the other pins are between VSS and VDD.

Typically, these parts are used in a single (positive)

supply configuration. In this case, VSS is connected to

ground and VDD is connected to the supply. VDD will

need bypass capacitors.

3.4

Calibration Common Mode

Voltage Input

A low impedance voltage placed at this input (VCAL)

analog input will set the op amps’ common mode input

voltage during calibration. If this pin is left open, the

common mode input voltage during calibration is

approximately VDD/3. The internal resistor divider is

disconnected from the supplies whenever the part is

not in calibration.

3.5

Calibrate/Chip Select Digital Input

This input (CAL/CS, …) is a CMOS, Schmitt-triggered

input that affects the calibration and low power modes

of operation. When this pin goes high, the part is placed

into a low power mode and the output is high-Z. When

this pin goes low, a calibration sequence is started

(which corrects VOS). At the end of the calibration

sequence, the output becomes low impedance and the

part resumes normal operation.

An internal POR triggers a calibration event when the

part is powered on, or when the supply voltage drops

too low. Thus, the MCP622 parts are calibrated, even

though they do not have a CAL/CS pin.

3.6

Exposed Thermal Pad (EP)

There is an internal connection between the Exposed

Thermal Pad (EP) and the VSS pin; they must be

connected to the same potential on the Printed Circuit

Board (PCB).

This pad can be connected to a PCB ground plane to

provide a larger heat sink. This improves the package

thermal resistance (

θJA).

MCP621

MCP622

MCP625

Symbol

Description

SOIC

DFN

MSOP

DFN

VOUT, VOUTA

Output (op amp A)

VIN–, VINA–

Inverting Input (op amp A)

VIN+, VINA+

Non-inverting Input (op amp A)

VSS

Negative Power Supply

8—

—

CAL/CS, CALA/CSA

Calibrate/Chip Select Digital Input (op amp A)

——

—

CALB/CSB

Calibrate/Chip Select Digital Input (op amp B)

—5

VINB+

Non-inverting Input (op amp B)

—6

VINB–

Inverting Input (op amp B)

—7

VOUTB

Output (op amp B)

VDD

Positive Power Supply

5—

—

VCAL

Calibration Common Mode Voltage Input

—

No Internal Connection

—

Exposed Thermal Pad (EP);

must be connected to VSS

MCP621 Arkusz danych(PDF) 19 Page - Microchip Technology

MCP621 Arkusz danych(HTML) 19 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

Arkusz danych Pobierz

Link URL