ACT8342QKCQI-T datasheet(7/17 Pages) ACTIVE-SEMI

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ACT8342

Rev0, 26-May-08

SYSTEM MANAGEMENT

Innovative Power

- 7 -

www.active-semi.com

ActivePMU

TM is a trademark of Active-Semi.

FUNCTIONAL DESCRIPTION

General Description

The ACT8342 offers an array of system manage-

ment functions that allow it to provide optimal per-

formance in a wide range of applications.

System Startup and Shutdown

The ACT8342 features a flexible control architec-

ture that supports a variety of software-controlled

enable/disable functions that make it a simple yet

flexible and highly configurable solution.

The ACT8342 is automatically enabled when any of

the following conditions exists:

1) nMSTR is asserted low, or

2) ON1 is asserted high, or

3) ON2 is asserted high, or

4) ON3 is asserted high.

If any of these conditions is true, the ACT8342 en-

ables and ON1 drives REG1, ON2 drives REG2,

and ON3 drives REG3.

Manual Enable Due to Asserting nMSTR Low

System startup is initiated when the user presses

the push-button, asserting nMSTR low. When this

occurs, REG1 is enabled, which in turn enables the

processor to allow it to control the system power up

sequence. Once the power-up routine is success-

fully completed, the microprocessor must assert

ON1 so that the ACT8342 remains enabled after

the push-button is released by the user. Upon com-

pletion of the start-up sequence the processor as-

sumes control of the power system and all further

operation is software-controlled.

Manual Enable Due to Asserting ON1 High

The ACT8342 is compatible with applications that

do not utilize it’s push-button control function, and

may be enabled by simply driving ON1 to a logic-

high. In this case, the signal driving ON1 controls

enable/disable timing, although software-controlled

enable/disable sequences are still supported if the

processor assumes control of the power system

once the startup sequence is completed.

Shutdown Sequence

Once a successful power-up routine is completed,

the system processor controls the operation of the

power system, including the system shutdown tim-

ing and sequence. The ACT8342 asserts nIRQ low

when nMSTR is asserted low, providing a simple

means of alerting the system processor when the

user wishes to shut the system down. Asserting

nIRQ interrupts the system processor, initiating an

interrupt service routine in the processor which will

reveal that the user pressed the push-button. The

microprocessor may validate the input, such as by

ensuring that the push-button is asserted for a mini-

mum amount of time, then initiates a software-

controlled power-down routine, the final step of

which is to de-assert the ON1 input, disabling

REG1 and REG2 and shutting the system down.

nMSTR Enable Input

In most applications, connect nMSTR to an active

low, momentary push-button switch to utilize the

ACT8342’s closed-loop enable/disable functionality.

If a momentary-on switch is not used, drive nMSTR

to GA or to a logic low to initiate a startup se-

quence.

Enable/Disable Inputs

The

ACT8342

provides

three

manual

en-

able/disable inputs. When driven high, ON1 enables

REG1, ON2 enables REG2, and ON3 enables

OUT3.

nIRQ Output

The ACT8342 provides an active-low, open-drain

push-button status output that sinks current when

nMSTR is driven to a logic-low. Connect a pull-up

resistor from nIRQ to an appropriate voltage supply.

nIRQ is typically used to drive the interrupt input of

the system processor, and is useful in a variety of

software-controlled enable/disable control routines.

Thermal Shutdown

The ACT8342 integrates thermal shutdown protec-

tion circuitry to prevent damage resulting from ex-

cessive thermal stress, as may be encountered un-

der fault conditions. This circuitry disables all regu-

lators if the ACT8342 die temperature exceeds

160°C, and prevents the regulators from being en-

abled until the IC temperature drops by 20°C (typ).

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