MPC8533EVTAAJB datasheet(75/116 Pages) FREESCALE

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MPC8533E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 3

Freescale Semiconductor

PCI Express

TRX-EYE-MEDIAN-to-MAX

-JITTER

Maximum time

between the jitter

median and

maximum deviation

from the median

—

0.3

Jitter is defined as the measurement

variation of the crossing points (VRX-DIFFp-p

= 0 V) in relation to a recovered TX UI. A

recovered TX UI is calculated over 3500

consecutive unit intervals of sample data.

Jitter is measured using all edges of the 250

consecutive UI in the center of the 3500 UI

used for calculating the TX UI. See Notes 2,

3, and 7.

VRX-CM-ACp

AC peak common

mode input voltage

——

150

VRX-CM-ACp = |VRXD+ – VRXD–|/2 –

VRX-CM-DC

VRX-CM-DC = DC(avg) of |VRX-D+ – VRX-D–|/2

See Note 2.

RLRX-DIFF

Differential return

loss

—

Measured over 50 MHz to 1.25 GHz with the

D+ and D– lines biased at +300 and

–300 mV, respectively. See Note 4.

RLRX-CM

Common mode

return loss

—

Measured over 50 MHz to 1.25 GHz with the

D+ and D– lines biased at 0 V. See Note 4.

ZRX-DIFF-DC

DC differential input

impedance

100

120

RX DC differential mode impedance. See

Note 5.

ZRX-DC

DC input impedance

Required RX D+ as well as D– DC

impedance (50 ± 20% tolerance).

See Notes 2 and 5.

ZRX-HIGH-IMP-DC

Powered down DC

input impedance

200 k

—

Required RX D+ as well as D– DC

impedance when the receiver terminations

do not have power. See Note 6.

VRX-IDLE-DET-DIFFp-p

Electrical idle detect

threshold

—

175

VRX-IDLE-DET-DIFFp-p = 2 × |VRX-D+ – VRX-D–|

Measured at the package pins of the

receiver.

TRX-IDLE-DET-DIFF-

ENTERTIME

Unexpected

electrical idle enter

detect threshold

integration time

—

An unexpected electrical idle (VRX-DIFFp-p

< VRX-IDLE-DET-DIFFp-p) must be recognized

no longer than TRX-IDLE-DET-DIFF-ENTERING to

signal an unexpected idle condition.

Table 55. Differential Receiver (RX) Input Specifications (continued)

Symbol

Parameter

Min

Nom

Max

Units

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