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AT91SAM7X512 Arkusz danych(PDF) 45 Page - ATMEL Corporation |
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AT91SAM7X512 Arkusz danych(HTML) 45 Page - ATMEL Corporation |
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45 / 687 page ![]() 45 6120H–ATARM–17-Feb-09 AT91SAM7X512/256/128 Preliminary 12. Debug and Test Features 12.1 Description The AT91SAM7X Series features a number of complementary debug and test capabilities. A common JTAG/ICE (In-Circuit Emulator) port is used for standard debugging functions, such as downloading code and single-stepping through programs. The Debug Unit provides a two-pin UART that can be used to upload an application into internal SRAM. It manages the interrupt handling of the internal COMMTX and COMMRX signals that trace the activity of the Debug Communication Channel. A set of dedicated debug and test input/output pins gives direct access to these capabilities from a PC-based test environment. 12.2 Block Diagram Figure 12-1. Debug and Test Block Diagram ICE PDC DBGU DRXD DTXD TST TMS TCK TDI JTAGSEL TDO Boundary TAP ICE/JTAG TAP ARM7TDMI Reset and Test POR |
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