ATmega169P datasheet(40/393 Pages) ATMEL

40 / 393 page

8018N–AVR–08/09

ATmega169P

Power Management and Sleep Modes

Sleep modes enable the application to shut down unused modules in the MCU, thereby saving-

power. The AVR provides various sleep modes allowing the user to tailor the power

consumption to the application’s requirements.

9.1

Sleep Modes

Figure 8-1 on page 30 presents the different clock systems in the ATmega169P, and their distri-

bution. The figure is helpful in selecting an appropriate sleep mode. Table 9-1 shows the

different sleep modes and their wake up sources.

Notes:

1. Only recommended with external crystal or resonator selected as clock source.

2. If either LCD controller or Timer/Counter2 is running in asynchronous mode.

3. For INT0, only level interrupt.

To enter any of the sleep modes, the SE bit in SMCR must be written to logic one and a SLEEP

instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select which

sleep mode will be activated by the SLEEP instruction. See Table 9-2 on page 45 for a

summary.

If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU

is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and

resumes execution from the instruction following SLEEP. The contents of the Register File and

SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,

the MCU wakes up and executes from the Reset Vector.

Table 9-1.

Active Clock Domains and Wake-up Sources in the Different Sleep Modes.

Active Clock Domains

Oscillators

Wake-up Sources

Sleep

Mode

Idle

XXX

X(2)

XXXX

XXX

ADC NRM

X(2)

X(3)

XX(2)

X(2)

Power-

down

X(3)

Power-

save

X(3)

XXX

Standby(1)

XX(3)

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