SC656 datasheet(13/17 Pages) SEMTECH

13 / 17 page

SC656

Applications Information (continued)

Table 2 — Backlight Bank Configuration Settings

Bank 2

Bank 1

Main Bank

Sub Bank

BL — BL7

none

BL2 — BL7

BL3 — BL7

BL — BL2

BL4 — BL7

BL — BL3

LED Backlight Current Sinks

The full scale backlight current (I

FS_BL) is set via the current

through the ISET pin controlling the corresponding LED

bank (ISETM or ISETS) . The I

FS_BL is regulated to the value

of the ISETM or ISETS pin current multiplied by an internal

gain of 00A/A. R

ISETM and RISETS are used to control the

current into the ISETM and ISETS pins. The relationship

between each resistance R

ISETx and the full scale backlight

current is:

ISETx = 00/IFS_BL

All backlight current sinks have matched currents, even

when there is a variation in the forward voltages (∆V

F ) of

the LEDs. A ∆V

F of .0V is supported when the input

voltage is at 2.9V. Higher ∆V

F LED mis-match is supported

when V

IN is higher than 2.9V. All current sink outputs are

compared and the lowest output is used for setting the

voltage regulation at the OUT pin. This is done to ensure

that sufficient bias exists for all LEDs.

Any unused LED driver outputs must be left open for

normal operation.

PWM Operation

A PWM signal on the ENM or ENS pin can be used to

adjust the DC current through the LEDs. When the duty

cycle is 00%, the backlight current through each LED (I

BL)

equals the full scale current set by the corresponding ISET

pin. As the duty cycle decreases, the ENM or ENS input

samples the control signal and converts the duty cycle to

a DC current level. In conventional PWM controlled

systems, the output current pulses on and off with the

PWM input to achieve an average output current.

Providing a DC current through the LEDs instead of a

pulsed current provides an efficiency advantage over

other PWM controlled systems by allowing the charge

pump to remain in x mode longer since the maximum

current is equal to the average current.

PWM Sampling

The sampling system that translates the PWM signal to

a DC current requires the ENM and ENS pins to have a

minimum high time t

HIGH_MIN to set the DC level. High

time less than t

HIGH_MIN impacts the accuracy of the target

BL. The minimum duty cycle needed to support the

minimum high time specification varies with the applied

PWM frequency (see figure ). Note that use of a lower

PWM frequency, from 200Hz to 0kHz, will support

lower minimum duty cycle and an extended backlight

dimming range.

0.2

PWM Frequency (kHz�

tHIGH_MIN = 1µs

Figure 1 — Minimum Duty Cycle

Shutdown Mode

Shutdown occurs after ENM and ENS are both held low

for an interval of 5ms or more. When the ENM and ENS

pins are both held low for 5ms or less, the device will not

shutdown.

Protection Features

The SC656 provides several protection features to safe-

guard the device from catastrophic failures.These features

include:

Output Open Circuit Protection

Over-Temperature Protection

Charge Pump Output Current Limit

LED Float Detection

•

SC656 Arkusz danych(PDF) 13 Page - Semtech Corporation

SC656 Arkusz danych(HTML) 13 Page - Semtech Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

Arkusz danych Pobierz

Link URL