HT95R35 datasheet(21/73 Pages) HOLTEK

21 / 73 page

HT95R35

Rev. 1.00

October 7, 2009

Timer Control Registers

- TMR0C, TMR1C, TMR2C

The flexible features of the Holtek microcontroller

Timer/Event Counters enable them to operate in three

different modes, the options of which are determined by

the contents of their control register, which has the

name TMR0C/TMR1C/TMR2C. It is the Timer Control

pair that control the full operation of each Timer/Event

Counter. Before the Timer/Event Counter can be used, it

is essential that the Timer Control Register is fully pro-

grammed with the right data to ensure its correct opera-

tion, a process that is normally carried out during

program initialisation.

To choose which of the three modes the Timer/Event

Counter is to operate in, either in the timer mode, the

event counting mode or the pulse width measurement

mode, bits 7 and 6 of the Timer Control Register, which

are known as the bit pair T0M1/T0M0, T1M1/T1M0 and

T2M1/T2M0, must be set to the required logic levels.

The Timer/Event Counter on/off bit, which is bit 4 of the

Timer Control Register, and known as T0ON, T1ON and

T2ON, provides the basic on/off control of the

Timer/Event Counter. Setting the bit high allows the

Timer/Event Counter to run, clearing the bit stops it run-

ning. If the Timer/Event Counter is in the event count or

pulse width measurement mode, the active transition

edge level type is selected by the logic level of bit 3 of

the Timer Control Register which is known as T0E and

T1E.

1 6 - b i t

P r e l o a d R e g i s t e r

D a t a B u s

R e l o a d

O v e r f l o w

t o I n t e r r u p t

L o w B y t e B u f f e r

H i g h B y t e

L o w B y t e

1 6 - B i t T i m e r / E v e n t C o u n t e r

T M R 0

T 0 E

T i m e r / E v e n t C o u n t e r

M o d e C o n t r o l

T 0 O N

f S Y S / 4

T 0 M 1

T 0 M 0

16-bit Timer/Event Counter 0 Structure

1 6 - b i t

P r e l o a d R e g i s t e r

D a t a B u s

R e l o a d

O v e r f l o w

t o I n t e r r u p t

L o w B y t e B u f f e r

H i g h B y t e

L o w B y t e

1 6 - B i t T i m e r / E v e n t C o u n t e r

T M R 1

T 1 E

T i m e r / E v e n t C o u n t e r

M o d e C o n t r o l

T 1 O N

3 2 7 6 8 H z

T 1 M 1

T 1 M 0

16-bit Timer/Event Counter 1 Structure

1 6 - b i t

P r e l o a d R e g i s t e r

D a t a B u s

R e l o a d

O v e r f l o w

t o I n t e r r u p t

L o w B y t e B u f f e r

H i g h B y t e

L o w B y t e

1 6 - B i t T i m e r

T i m e r / E v e n t C o u n t e r

M o d e C o n t r o l

T 2 O N

f S Y S / 4

T 2 M 1

T 2 M 0

16-bit Timer2 Structure

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