 |
Zakładka z wyszukiwarką danych komponentów |
|
|
Zakładka z wyszukiwarką danych komponentów |
|
ST8024S Arkusz danych(PDF) 17 Page - Sitronix Technology Co., Ltd. |
|
|
|||||||||||||||||||||||||||||
ST8024S Arkusz danych(HTML) 17 Page - Sitronix Technology Co., Ltd. |
|
|
17 / 27 page  ST8024S Ver 0.39 Page 17/27 2008/05/05 10.2 AC Characteristics (Segment Mode 1) (LGND=VSS = GND = 0V, VDD = +5.0± 0.5V, V0 = +15.0 to +30.0V, TOPR = -25 to +85 °C) PARAMETER SYMBOL CONDITIONS MIN TYP. MAX. UNIT NOTE Shift clock period tWCK tR,tF ≤ 10ns 50 ns 1 Shift clock "H" pulse width tWCKH 15 ns Shift clock "L" pulse width tWCKL 15 ns Data setup time tDS 10 ns Data hold time tDH 12 ns Latch pulse "H" pulse width tWLPH 15 ns Shift clock rise to latch pulse rise time tLD 0 ns Shift clock fall to latch pulse fall time tSL 30 ns Latch pulse rise to shift clock rise time tLS 25 ns Latch pulse fall to shift clock fall time tLH 25 ns Enable setup time tS 10 ns Input signal rise time tR 50 ns 2 Input signal fall time tF 50 ns 2 /DISPOFF removal time tSD 100 ns /DISPOFF "L" pulse width tWDL 1.2 µ s Output delay time (1) tD CL = 15 pF 30 ns Output delay time (2) tPD1, tPD2 CL = 15 pF 1.2 µ s Output delay time (3) tPD3 CL = 15 pF 1.2 µ s NOTES: 1. Takes the cascade connection into consideration. 2. (tWCK - tWCKH - tWCKL)/2 is maximum in the case of high speed operation. (Segment Mode 2) (LGND=VSS = GND = 0V, VDD = +3.0 to +4.5V, V0 = +15.0 to +30.0V, TOPR = -25 to +85°C) PARAMETER SYMBOL CONDITIONS MIN. TYP. MAX. UNIT NOTE Shift clock period tWCK tR,tF ≤ 10ns 66 ns 1 Shift clock "H" pulse width tWCKH 23 ns Shift clock "L” pulse width tWCKL 23 ns Data setup time tDS 15 ns Data hold time tDH 23 ns Latch pulse "H" pulse width tWLPH 30 ns Shift clock rise to latch pulse rise time tLD 0 ns Shift clock fall to latch pulse fall time tSL 50 ns Latch pulse rise to shift clock rise time tLS 30 ns Latch pulse fall to shift clock fall time tLH 30 ns Enable setup time tS 15 ns Input signal rise time tR 50 ns 2 Input signal fall time tF 50 ns 2 /DISPOFF removal time tSD 100 ns /DISPOFF "L" pulse width tWDL 1.2 µ s Output delay time (1) tD CL = 15 pF 41 ns Output delay time (2) tPD1, tPD2 CL = 15 pF 1.2 µ s Output delay time (3) tPD3 CL = 15 pF 1.2 µ s NOTES: 1. Takes the cascade connection into consideration. 2. (tWCK - tWCKH - tWCKL)/2 is maximum in the case of high speed operation. |
|
Link URL |
| Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Link do karty katalogowej | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Polish ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
