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74LVC1T45 Arkusz danych(PDF) 21 Page - NXP Semiconductors |
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74LVC1T45 Arkusz danych(HTML) 21 Page - NXP Semiconductors |
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21 / 30 page ![]() 74LVC_LVCH1T45_2 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 02 — 19 January 2010 21 of 30 NXP Semiconductors 74LVC1T45; 74LVCH1T45 Dual supply translating transceiver; 3-state a. HIGH to LOW propagation delay (A to B) b. LOW to HIGH propagation delay (A to B) c. HIGH to LOW propagation delay (B to A) d. LOW to HIGH propagation delay (B to A) (1) VCC(B) = 1.2 V. (2) VCC(B) = 1.5 V. (3) VCC(B) = 1.8 V. (4) VCC(B) = 2.5 V. (5) VCC(B) = 3.3 V. (6) VCC(B) = 5.0 V. Fig 14. Typical propagation delay vs load capacitance; Tamb = 25 °C; VCC(A) = 5 V CL (pF) 035 001aai927 14 tPHL (ns) 0 2 4 6 8 10 12 5 1015202530 (1) (5) (4) (2) (3) (6) CL (pF) 035 001aai928 14 tPLH (ns) 0 2 4 6 8 10 12 5 1015202530 (1) (5) (4) (2) (3) (6) CL (pF) 035 001aai929 14 tPHL (ns) 0 2 4 6 8 10 12 5 1015202530 (1) (5) (4) (2) (3) (6) CL (pF) 035 001aai930 14 tPLH (ns) 0 2 4 6 8 10 12 5 1015202530 (1) (5) (4) (2) (3) (6) |
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