PIC12F615 datasheet(60/212 Pages) MICROCHIP

60 / 212 page

PIC12F609/615/617/12HV609/615

DS41302D-page 60

 2010 Microchip Technology Inc.

7.6

Timer1 Gate

Timer1 gate source is software configurable to be the

T1G pin (or the alternate T1G pin) or the output of the

Comparator. This allows the device to directly time

external events using T1G or analog events using the

Comparator. See the CMCON1 Register (Register 9-2)

for selecting the Timer1 gate source. This feature can

simplify the software for a Delta-Sigma A/D converter

and many other applications. For more information on

Delta-Sigma A/D converters, see the Microchip web site

(www.microchip.com).

Timer1 gate can be inverted using the T1GINV bit of

the T1CON register, whether it originates from the T1G

pin or the Comparator output. This configures Timer1

to measure either the active-high or active-low time

between events.

7.7

Timer1 Interrupt

The Timer1 register pair (TMR1H:TMR1L) increments

to FFFFh and rolls over to 0000h. When Timer1 rolls

over, the Timer1 interrupt flag bit of the PIR1 register is

set. To enable the interrupt on rollover, you must set

these bits:

• Timer1 interrupt enable bit of the PIE1 register

• PEIE bit of the INTCON register

• GIE bit of the INTCON register

The interrupt is cleared by clearing the TMR1IF bit in

the Interrupt Service Routine.

7.8

Timer1 Operation During Sleep

Timer1 can only operate during Sleep when setup in

Asynchronous Counter mode. In this mode, an external

crystal or clock source can be used to increment the

counter. To set up the timer to wake the device:

• TMR1ON bit of the T1CON register must be set

• TMR1IE bit of the PIE1 register must be set

• PEIE bit of the INTCON register must be set

The device will wake-up on an overflow and execute

the next instruction. If the GIE bit of the INTCON

Routine (0004h).

7.9

ECCP Capture/Compare Time

Base (PIC12F615/617/HV615 only)

The ECCP module uses the TMR1H:TMR1L register

pair as the time base when operating in Capture or

Compare mode.

In Capture mode, the value in the TMR1H:TMR1L

In Compare mode, an event is triggered when the value

CCPR1H:CCPR1L register pair matches the value in

the TMR1H:TMR1L register pair. This event can be a

Special Event Trigger.

For more information, see Section 11.0 “Enhanced

Capture/Compare/PWM (With Auto-Shutdown and

Dead Band) Module (PIC12F615/617/HV615 only)”.

Note:

TMR1GE bit of the T1CON register must

be set to use either T1G or COUT as the

Timer1 gate source. See Register 9-2 for

more information on selecting the Timer1

gate source.

Note:

The TMR1H:TTMR1L register pair and the

TMR1IF bit should be cleared before

enabling interrupts.

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