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NCP1237 Arkusz danych(PDF) 29 Page - ON Semiconductor |
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NCP1237 Arkusz danych(HTML) 29 Page - ON Semiconductor |
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29 / 34 page ![]() NCP1237 http://onsemi.com 29 Figure 27. Latch−off Function Timing Diagram time Internal Latch Signal time VCC time DRV VCC(on) VCC(min) Latch signal high during pre-start phase Noise spike ignored (tLatch blanking) Start-up initiated by VCC(on) Switching allowed (no latch event) Latch-off Temperature shutdown The die includes a temperature shutdown protection with a turn−off threshold guaranteed between 140 °C and 160°C, and a typical hysteresis of 30 °C. When the temperature rises above the high threshold, the controller stops switching instantaneously, the HV current source is turned off, and the internal logic state is reset. When the temperature falls below the low threshold, the HV startup current source is enabled, and a regular startup sequence takes place. |
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