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WM8141 Arkusz danych(PDF) 8 Page - Wolfson Microelectronics plc |
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WM8141 Arkusz danych(HTML) 8 Page - Wolfson Microelectronics plc |
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8 / 31 page ![]() WM8141 Production Data WOLFSON MICROELECTRONICS LTD PD Rev 3.0 October 2000 8 INPUT VIDEO SAMPLING MCLK VSMP INPUT VIDEO t PER t VSMPSU t VSMPH t VSU t VH t RSU t RH t MCLKL t MCLKH Figure 1 Input Video Timing Test Conditions AVDD = DVDD1 = DVDD2 = 4.75 to 5.25V, AGND = DGND = 0V, TA = 0 to 70 °C, MCLK = 12MHz unless otherwise stated PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS MCLK period tPER 83.3 ns MCLK high period tMCLKH 37.5 ns MCLK low period tMCLKL 37.5 ns VSMP set-up time tVSMPSU 10 ns VSMP hold time tVSMPH 10 ns Video level set-up time tVSU 10 ns Video level hold time tVH 15 ns Reset level set-up time tRSU 10 ns Reset level hold time tRH 15 ns Notes: 1. tVSU and tRSU denote the set-up time required after the input video signal has settled. 2. Parameters are measured at 50% of the rising/falling edge. OUTPUT DATA TIMING MCLK OP[11:0] t PD Figure 2 Output Data Timing |
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