WM8720

Production Data

WOLFSON MICROELECTRONICS LTD

PD Rev 3.0 November 2000

2

PIN CONFIGURATION

ORDERING INFORMATION

DEVICE

TEMP. RANGE

PACKAGE

WM8720EDS

-25 to +85

20-pin SSOP

16

15

14

20

19

18

17

5

6

7

1

2

3

4

BCKIN

DIN

LRCIN

MUTE

MODE

DGND

DVDD

RSTB

MD/DM

MC/IWL

ML/I2S

TEST

PWDN

SCKI

13

12

11

8

9

10

AVDD

VOUTL

CAP

AGND

VOUTR

ZERO

PIN DESCRIPTION

PIN

NAME

TYPE

DESCRIPTION

1

PWDN

Digital input

Powerdown control; low is ON, high is POWER OFF. Internal pull-down.

2

SCKI

Digital input

System clock input (256 or 384fs).

3

TEST

Digital output

Reserved.

4

ML/I2S

Digital input

Latch enable (software mode) or input format selection (hardware mode).

Internal pull-up.

5

MC/IWL

Digital input

Serial control data clock input (software mode) or input word length

selection (hardware mode). Internal pull-up.

6

MD/DM

Digital input

Serial control data input (software mode) or de-emphasis selection

(hardware mode). Internal pull-up.

7

RSTB

Digital input

Reset input – active low. Internal pull-up.

8

ZERO

Digital output

Infinite zero detect – active low. Open drain type output with active

pull-down.

9

VOUTR

Analogue output

Right channel DAC output.

10

AGND

Supply

Analogue ground supply.

11

AVDD

Supply

Analogue positive supply.

12

VOUTL

Analogue output

Left channel DAC output.

13

CAP

Analogue output

Analogue internal reference.

14

BCKIN

Digital input

Audio data bit clock input.

15

DIN

Digital input

Serial audio data input.

16

LRCIN

Digital input

Sample rate clock input.

17

MUTE

Digital IO

Mute control pin, input or automute output.

Low is not mute, high is mute, Z is automute.

18

MODE

Digital input

Mode select pin. Low is software mode, high is hardware control.

Internal pull-down.

19

DVDD

Supply

Digital positive supply.

20

DGND

Supply

Digital ground supply.

Note:

Digital input pins have Schmitt trigger input buffers.