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STMPE610 Arkusz danych(PDF) 20 Page - STMicroelectronics |
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STMPE610 Arkusz danych(HTML) 20 Page - STMicroelectronics |
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20 / 56 page ![]() Interrupt system STMPE610 20/56 Doc ID 15432 Rev 3 8 Interrupt system The STMPE610 uses a 2-tier interrupt structure. The ADC interrupts and GPIO interrupts are ganged as a single bit in the “interrupt status register”. The interrupts from the touchscreen controller can be seen directly in the interrupt status register. Figure 8. Interrupt system diagram GPIO interrupt status FIFO status TSC touch AND Interrupt enable Interrupt status AND GPIO interrupt enable AND ADC interrupt enable ADC interrupt status AM00752V2 |
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