© Freescale Semiconductor, Inc., 2011. All rights reserved.

Freescale Semiconductor

This document provides an overview of the MPC8308

features and its hardware specifications, including a block

diagram showing the major functional components. The

MPC8308 is a cost-effective, low-power, highly integrated

host processor. The MPC8308 extends the PowerQUICC

family, adding higher CPU performance, additional

functionality, and faster interfaces while addressing the

requirements related to time-to-market, price, power

consumption, and package size.

1Overview

Figure 1 shows the major functional units within the

MPC8308. The e300 core in the MPC8308, with its 16

Kbytes of instruction and 16 Kbytes of data cache,

implements the Power Architecture user instruction set

architecture and provides hardware and software debugging

support. In addition, the MPC8308 offers a PCI Express

controller, two three-speed 10, 100, 1000 Mbps Ethernet

controllers (eTSEC), a DDR2 SDRAM memory controller, a

SerDes block, an enhanced local bus controller (eLBC), an

integrated programmable interrupt controller (IPIC), a

UART (DUART), GPIOs, USB, general purpose timers, and

Document Number: MPC8308EC

Rev. 2, 02/2011

Contents

1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

2. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . 2

3. Power Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 6

4. Clock Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

5. RESET Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . 8

6. DDR2 SDRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

7. DUART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

8. Ethernet: Three-Speed Ethernet, MII Management . 15

9. USB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

10. High-Speed Serial Interfaces (HSSI) . . . . . . . . . . . . 25

11. PCI Express . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

12. Enhanced Local Bus . . . . . . . . . . . . . . . . . . . . . . . . . 44

13. Enhanced Secure Digital Host Controller (eSDHC) . 48

14. JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

15. I

2C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

16. Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

17. GPIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

18. IPIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

19. SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

20. Package and Pin Listings . . . . . . . . . . . . . . . . . . . . . 63

21. Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

22. Thermal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

23. System Design Information . . . . . . . . . . . . . . . . . . . 82

24. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . 86

25. Document Revision History . . . . . . . . . . . . . . . . . . . 88

MPC8308 PowerQUICC II Pro

Processor Hardware Specification