EM357-RTR datasheet(219/240 Pages) ETC2

219 / 240 page

EM351 / EM357

17 Serial Wire and JTAG (SWJ) Interface

The EM35x includes a standard Serial Wire and JTAG (SWJ) Interface. The SWJ is the primary debug and

programming interface of the EM35x. The SWJ gives debug tools access to the internal buses of the EM35x,

and allows for non-intrusive memory and register access as well as CPU halt-step style debugging. Therefore,

any design implementing the EM35x should make the SWJ signals readily available.

Serial Wire is an ARM® standard, bi-directional, two-wire protocol designed to replace JTAG, and provides all

the normal JTAG debug and test functionality. JTAG is a standard five-wire protocol providing debug and test

functionality. In addition, the two Serial Wire signals (SWDIO and SWCLK) are overlaid on two of the JTAG

signals (JTMS and JTCK). This keeps the design compact and allows debug tools to switch between Serial Wire

and JTAG as needed, without changing pin connections.

While Serial Wire and JTAG offer the same debug and test functionality, Ember recommends Serial Wire.

Serial Wire uses only two pins instead of five, and offers a simple communication protocol, high performance

data rates, low power, built-in error detection, and protection from glitches.

The ARM® CoreSightTM Debug Access Port (DAP) comprises the Serial Wire and JTAG Interface (SWJ). As

illustrated in Figure 17-1, the DAP includes two primary components: a debug port (the SWJ-DP) and an access

port (the AHB-AP). The SWJ-DP provides external debug access, while the AHB-AP provides internal bus

access. An external debug tool connected to the EM35x’s debug pins communicates with the SWJ-DP. The

SWJ-DP then communicates with the AHB-AP. Finally, the AHB-AP communicates on the internal bus.

Figure 17-1. SWJ Block Diagram

SWJ-DP

select

SWJ-DAP

interface

JTAG

interface

Control and

AP interface

pins

AHB-AP

AHB

Serial Wire and JTAG share five pins:

JRST

JTDO

JTDI

SWDIO/JTMS

SWCLK/JTCK

Note:

The SWJ pins are forced functions, and their corresponding GPIO_PxCFGH/L configurations are

overridden when the EM35x resets. An application must disable all debug SWJ debug functionality to reclaim

any of the four SWJ GPIOs: PC0, PC2, PC3, and PC4.

Since these pins can be repurposed, refer to Chapter 1, Pin Assignments, and Section 7.3, Forced Functions, in

Chapter 7, GPIO, for complete pin descriptions and configurations.

For further information on the SWJ, contact Ember support for Application Notes and ARM® CoreSightTM

documentation.

17-1

120-035X-000D

Preliminary

EM357-RTR Arkusz danych(PDF) 219 Page - List of Unclassifed Manufacturers

EM357-RTR Arkusz danych(HTML) 219 Page - List of Unclassifed Manufacturers

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Arkusz danych Pobierz

Link URL