Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

Preview PDF HTML

M41T62 Arkusz danych(PDF) 35 Page - STMicroelectronics

Numer części M41T62
Szczegółowy opis  Serial real-time clocks with alarm
PDF  41 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M41T62 Arkusz danych(HTML) 35 Page - STMicroelectronics

Back Button M41T62 Datasheet HTML 31Page - STMicroelectronics M41T62 Datasheet HTML 32Page - STMicroelectronics M41T62 Datasheet HTML 33Page - STMicroelectronics M41T62 Datasheet HTML 34Page - STMicroelectronics M41T62 Datasheet HTML 35Page - STMicroelectronics M41T62 Datasheet HTML 36Page - STMicroelectronics M41T62 Datasheet HTML 37Page - STMicroelectronics M41T62 Datasheet HTML 38Page - STMicroelectronics M41T62 Datasheet HTML 39Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 35 / 41 page
background image
M41T62/63/64/65
DC and AC parameters
Doc ID 10397 Rev 14
35/41
Table 17.
Oscillator characteristics
Figure 26.
Bus timing requirements sequence
Table 18.
AC characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VSTA
Oscillator start voltage
≤ 10 seconds
1.5
V
tSTA
Oscillator start time
VCC = 3.0 V
1
s
Cg
XIN capacitance
12
pF
Cd
XOUT capacitance
12
pF
IC-to-IC frequency variation (1)
1.
Reference value. TA = 25 °C, VCC = 3.0 V, CMJ-145 (CL = 6 pF, 32,768 Hz) manufactured by Citizen,
CL = Cg • Cd / (Cg + Cd).
–10
+10
ppm
Sym
Parameter(1)
1.
Valid for ambient operating temperature: TA = –40 to 85 °C; VCC = 1.3 to 4.4 V (except where noted).
Min
Max
Units
fSCL
SCL clock frequency
0
400
kHz
tLOW
Clock low period
1.3
µs
tHIGH
Clock high period
600
ns
tR
SDA and SCL rise time
300
ns
tF
SDA and SCL fall time
300
ns
tHD:STA
START condition hold time
(after this period the first clock pulse is generated)
600
ns
tSU:STA
START condition setup time
(only relevant for a repeated start condition)
600
ns
tSU:DAT
(2)
2.
Transmitter must internally provide a hold time to bridge the undefined region (300 ns max) of the falling
edge of SCL.
Data setup time
100
ns
tHD:DAT
Data hold time
0
µs
tSU:STO
STOP condition setup time
600
ns
tBUF
Time the bus must be free before a new
transmission can start
1.3
µs
trec
Watchdog output pulse width
96
98
ms
AI00589
SDA
P
tSU:STO
tSU:STA
tHD:STA
SR
SCL
tSU:DAT
tF
tHD:DAT
tR
tHIGH
tLOW
tHD:STA
tBUF
S
P



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41


Arkusz danych Pobierz

Go To PDF Page


Link URL



Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Link do karty katalogowej    |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com