SATA

Gen1/2

TUSB9260

HDD

USB 3.0

SuperSpeed

(1)

USB 2.0

High-speed

(1)

PC

with

USB 3.0

Support

(1)

USB connection is made at either SuperSpeed or High-Speed depending on the upstream connection support.

TUSB9260

SLLS962C – DECEMBER 2009 – REVISED JULY 2010

www.ti.com

2

INTRODUCTION

2.1

System Overview

The TUSB9260 is an ARM cortex M3 microcontroller based USB 3.0 to serial ATA bridge. It provides the

necessary hardware and firmware to implement a USB attached SCSI protocol (UASP) compliant mass

storage device suitable for bridging hard disk drives (HDD), solid state disk drives (SSD), optical drives

and other compatible SATA 1.5-Gbps or SATA 3.0-Gbps devices to a USB 3.0 bus. In addition to UASP

support, the firmware implements the mass storage class bulk-only transport (BOT), and USB human

in-terface device (HID) interfaces.

2.2

Device Block Diagram

The major functional blocks are as follows:

•

Cortex M3 microcontroller subsystem including the following peripherals:

–

Time interrupt modules, including watchdog timer

–

Universal asynchronous receive/transmit (SCI)

–

Serial peripheral interface (SPI)

–

General purpose input/output (GPIO)

–

PWM for support of PWM outputs (PWM)

•

USB 3.0 core (endpoint controller) and integrated SuperSpeed PHY

•

AHCI compliant SATA controller and integrated SATA PHY

–

Supporting gen1i, gen1m, gen2i, and gen2m

•

Chip level clock generation and distribution

•

Support for JTAG 1149.1 and 1149.6

6

INTRODUCTION

Copyright © 2009–2010, Texas Instruments Incorporated

Submit Documentation Feedback

Product Folder Link(s): TUSB9260