Preliminary
11-38
RF2516
Rev A10 010613
11
Pin
Function
Description
Interface Schematic
11
VREF P
Bias voltage reference pin for bypassing. The bypass capacitor should
be of appropriate size to provide filtering of the reference crystal fre-
quency and be connected directly to this pin. Diodes shown in the inter-
face schematic provide 3kV electrostatic discharge (ESD) protection
using the human body model.
12
RESNTR-
The RESNTR pins are used to supply DC voltage to the VCO, as well
as to tune the center frequency of the VCO. Equal value inductors
should be connected to this pin and pin 13.
13
RESNTR+
See pin 12.
14
LOOP FLT
Output of the charge pump. An RC network from this pin to ground is
used to establish the PLL bandwidth. Diodes shown in the interface
schematic provide 3kV electrostatic discharge (ESD) protection using
the human body model.
15
LD FLT
This pin is used to set the threshold of the lock-detect circuit. A shunt
capacitor should be used to set an RC time constant with the on-chip
series 1k resistor. This signal is used to clamp (enable or disable) the
MOD IN circuitry. The time constant should be approximately 10 times
the reference period. Diodes shown in the interface schematic provide
3kV electrostatic discharge (ESD) protection using the human body
model.
16
DIV CTRL
Logic “High” input selects divide-by-64 prescaler. Logic “Low” input
selects divide-by-32 prescaler. Diodes shown in the interface sche-
matic provide 3kV electrostatic discharge (ESD) protection using the
human body model.
VREF P
V
CC
RESNTR-
RESNTR+
LOOP FLT
4k
Ω
LOOP FLT
V
CC
V
CC
LD FLT
1k
Ω
V
CC
DIV CTRL
Polish ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
