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S5T8808A01-R0B0 Arkusz danych(PDF) 11 Page - Samsung semiconductor |
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S5T8808A01-R0B0 Arkusz danych(HTML) 11 Page - Samsung semiconductor |
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11 / 12 page ![]() PLL FREQUENCY SHNTHESIZER FOR PAGER S5T8808A 11 Figure 6. Phase Detector / Lock Detector Output Waveforms NOTES: 1. Phase detector always compares the Phase difference of N-counter with R-counter, and set to High or Low state as much as the phase difference. 2. The LD output set to Low level same as Phase detector error width. Fr Fn PDP LD VDD1 GND PDA |
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