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5

AHF28XX Series

Notes to Specifications

AHF2805S

1. Parameter guaranteed by line and load regulation tests.

2. Bandwidth guaranteed by design. Tested for 20KHz to 2.0MHz.

3. Capacitive load may be any value from 0 to the maximum limit without compromising dc performance.

A capacitive in excess of the maximum limit will not disturb loop stability but may interfere with the

operation of the load fault detection circuitry, appearing as a short circuit during turn-on.

4. Parameter shall be tested as part of design characterization and after design or process changes.

Thereafter, parameters shall be guaranteed to the limits specified in Table I.

5. An overload is that condition with a load in excess of the rated load but less than that necessary to

trigger the short circuit protection and is the condition of maximum power dissipation.

6. Load step transition time between 2.0

µs and 10µs.

7. Recovery time is measured from the initiation of the transient to where V

percent of V

8. Input step transition time between 2.0

µs and 10µs.

9. Turn-on delay time measurement is for either a step application of power at the input or the removal of

ground signal from the inhibit pin (pin 1) while power is applied to the input is unlimited.

Test

Symbol

Conditions

Group A

Device

Unit

-55°C

≤ Tc ≤ +125°C

Subgroups

Types

Unless otherwise specified

Min

Max

50% to/from 100%

rated load

0% to/from 50%

rated load

50% to/from 100% rated load

4,5,6

70

µs

0% to/from 50% rated load

4,5,6

1200

µs

50% to/from 0% rated load

4,5,6

8.0

ms

Input step 16V to/from

4,5,6

500

mVpk

rated load

4, 8

Input step 16V to/from

4,5,6

800

µs

rated load

4, 7, 8

Turn on overshoot

4,5,6

01

600

mVpk

Turn on delay

9

4,5,6

01

20

ms

Load fault

recovery

4, 9

Weight

38

g

ms

4,5,6

01

20

Limits

Recovery time

transient step line

changes

01

4,5,6

4,5,6

01

-300

+300

-500

+500

mVpk

Output response to

step transient load

changes

6

Recovery time step

transient load

changes

6, 7

01

Output response to

transient step line

changes

01