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Electrical Specifications

Datasheet

2.9

PECI DC Specifications

PECI is an Intel proprietary one-wire interface that provides a communication channel

between Intel processors (may also include chipset components in the future) and

external thermal monitoring devices. The processor contains Digital Thermal Sensors

(DTS) distributed throughout die. These sensors are implemented as analog-to-digital

converters calibrated at the factory for reasonable accuracy to provide a digital

representation of relative processor temperature. PECI provides an interface to relay

the highest DTS temperature within a die to external management devices for thermal/

fan speed control. More detailed information is available in the Platform Environment

Control Interface (PECI) Specification.

NOTE:

VTT supplies the PECI interface. PECI behavior does not affect VTT min/max specifications.

The leakage specification applies to powered devices on the PECI bus.

The input buffers use a Schmitt-triggered input design for improved noise immunity.

One node is counted for each client and one node for the system host. Extended trace

lengths might appear as additional nodes.

Table 19.

PECI DC Electrical Limits

Symbol

Definition and Conditions

Min

Max

Units Notes

Vin

Input Voltage Range

-0.15

VTT+ 0.15

Vhysteresis Hysteresis

0.1 * VTT

—V

Negative-edge threshold voltage

0.275 * VTT

0.500 * VTT

Positive-edge threshold voltage

0.550 * VTT

0.725 * VTT

Isource

High level output source

(VOH = 0.75 * VTT)

-6.0

N/A

Isink

Low level output sink

(VOL = 0.25 * VTT)

0.5

1.0

Ileak+

High impedance state leakage to VTT

N/A

µA

Ileak-

High impedance leakage to GND

N/A

µA

Cbus

Bus capacitance per node

—10

Vnoise

Signal noise immunity above 300 MHz

0.1 * VTT

—Vp-p

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