L9950XPTR datasheet(29/39 Pages) STMICROELECTRONICS

29 / 39 page

L9950 - L9950XP

Functional description of the SPI

Doc ID 10311 Rev 10

29/39

Table 20.

SPI - input data and status registers 1

Bit

Input register 1 (write)

Status register 1 (read)

Name

Comment

Name

Comment

Enable bit

If Enable bit is set the device

will be switched in active mode.

If Enable Bit is cleared device

go into standby mode and all

bits are cleared. After power-

on reset device starts in

standby mode.

Always 1

A broken VCC or SPI

connection of the L9950

can be detected by the

microcontroller, because

all 24 bits low or high is

not a valid frame.

OUT11 OC

Recovery

Enable

In case of an over-current

event the over-current status

bit (Status Register 0) is set

and the output is switched off.

If the over-current Recovery

Enable bit is set the output will

be automatically reactivated

after a delay time resulting in a

PWM modulated current with a

programmable duty cycle (Bit

21 of Input Data Register 0).

Depending on occurrence of

Overcurrent Event and internal

clock phase it is possible that

one recovery cycle is executed

even if this bit is set to zero.

VS overvoltage

In case of an overvoltage

or undervoltage event

the corresponding bit is

set and the outputs are

deactivated. If VS

voltage recovers to

normal operating

conditions outputs are

reactivated automatically.

OUT10 OC

Recovery

Enable

VS undervoltage

OUT9 OC

Recovery

Enable

Thermal shutdown

In case of an thermal

shutdown all outputs are

switched off. The

microcontroller has to

clear the TSD bit by

setting the Reset Bit to

reactivate the outputs.

OUT8 OC

Recovery

Enable

Temperature

warning

This bit is for information

purpose only. It can be

used for a thermal

management by the

microcontroller to avoid a

thermal shutdown.

OUT7 OC

Recovery

enable

Not ready bit

After switching the

device from standby

mode to active mode an

internal timer is started

to allow charge pump to

settle before the outputs

can be activated. This bit

is cleared automatically

after start up time has

finished. Since this bit is

controlled by internal

clock it can be used for

synchronizing testing

events(e.g. measuring

filter times).

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