L9803 datasheet(46/126 Pages) STMICROELECTRONICS

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On-Chip Peripherals

L9803

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The active transition is software programmable through the IEDGi bit of the Control Register

(CRi).

Timing resolution is one count of the free running counter: (fCPU/(CC1.CC0)).

Procedure

To use the input capture function select the following in the CR2 register:

–

Select the timer clock (CC1-CC0) (see Table 9: Clock Control Bits).

–

Select the edge of the active transition on the ICAP2 pin with the IEDG2 bit.

And select the following in the CR1 register:

–

Set the ICIE bit to generate an interrupt after an input capture.

–

Select the edge of the active transition on the ICAP1 pin with the IEDG1 bit.

When an input capture occurs:

–ICFi bit is set.

–The ICRi register contains the value of the free running counter on the active

transition on the ICAPi pin (see Figure 23).

–

A timer interrupt is generated if the ICIE bit is set and the I bit is cleared in the

CCR register. Otherwise, the interrupt remains pending until both conditions

become true.

Clearing the Input Capture interrupt request is done by:

Reading the SR register while the ICFi bit is set.

An access (read or write) to the ICLRi register.

Note:

After reading the ICHRi register, transfer of input capture data is inhibited until the ICLRi

The ICRi register always contains the free running counter value which corresponds to the

most recent input capture.

During HALT mode, if at least one valid input capture edge occurs on the ICAPi pin, the

input capture detection circuitry is armed. This does not set any timer flags, and does not

“wake-up” the MCU. If the MCU is awoken by an interrupt, the input capture flag will become

active, and data corresponding to the first valid edge during HALT mode will be present.

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