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ST10F276Z5 Arkusz danych(PDF) 24 Page - STMicroelectronics |
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ST10F276Z5 Arkusz danych(HTML) 24 Page - STMicroelectronics |
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24 / 239 page ![]() Functional description ST10F276Z5 24/239 3 Functional description The ST10F276Z5 architecture combines advantages of both RISC and CISC processors and an advanced peripheral subsystem. The block diagram gives an overview of the different on-chip components and the high bandwidth internal bus structure of the ST10F276Z5. Figure 3. Block diagram BRG BRG Port 6 Port 5 CPU-Core and MAC Unit XCAN2 XSSC XASC XCAN1 XI2C XRAM 2K XRAM 16K XRAM 48K (STBY) (PEC) XFLASH 320K IFLASH 512K 32 16 16 16 16 16 16 16 16 16 16 16 PEC Interrupt Controller Port 3 Port 7 Port 8 16 Watchdog IRAM 2K 16 XRTC Oscillator PLL 5V-1.8 V Voltage Regulator 16 16 8 816 15 8 8 16 16 32kHz Oscillator XPWM 16 |
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