Data Sheet TLE 6232 GP

V2.3

Page

2009-11-18

10

SPI Interface

SPI Communication

A SPI communication starts with a SPI instruction (SI control word) sent from the controller to

TLE 6232 GP. Simultaneously the device sends the first SO byte back to the µC.

During a writing cycle the controller sends the data after the SPI instruction, beginning with

the MSB. During a reading cycle, after having received the SPI instruction, TLE 6232 GP

sends the corresponding data to the controller, also starting with the MSB.

The SPI Interface consists of three register:

- MUX_REG: 8-bit (1 byte) length for parallel operation mode (IN1 ... IN6 enabled or not)

CS

SCLK

SPI Control:

SO

SCK

SI

CS

Power Stages 1...6

State Machine

Shift Register

Power Stages 1...6

MUX_REG

SCON_REG

Clock Counter

Control Bits

Parity Generator

Power Stages 1...6

DIA_REG