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FX980 Arkusz danych(PDF) 21 Page - CML Microcircuits |
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FX980 Arkusz danych(HTML) 21 Page - CML Microcircuits |
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21 / 86 page ![]() TETRA Baseband Processor FX980 © 1997 Consumer Microcircuits Limited 21 D/980/3 0 n_BigEndData Low RW When set active causes serial port read data, from the Rx port to be generated with the MSB data bit as the first serial word bit. If inactive, the LSB is first. On taking N_RESET Low this bit is active (i.e. the default is MSB first). • Address and Data format for ConFigCtrl2 access Data field [7:0] R D6 D5 D4 D3 D2 D1 D0 1 0 0 0 0 0 0 Address field [6:0] |
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