MIC705/06/07/08

Micrel, Inc.

MIC705/06/07/08

2

January 2006

Pin Configuration

1

2

3

4

GND

PFI

8

7

6

5

WDO

RESET

WDI

PFO

MIC705

MIC706

MR

PFO

1

2

3

4

GND

PFI

8

7

6

5

RESET

RESET

NC

PFO

MIC707

MIC708

MR

PFO

8-Pin PDIP Package

8-Pin SOIC Package

Pin Description

Pin Number

Pin Number

Pin Name

Pin Function

MIC705/06

MIC707/08

1

1

/MR

Manual Reset Input forces /RESET to assert when pulled below 0.8V. An

internal pull-up current of 250µA on this input forces it high when left floating.

this input can also be driven from TTL or CMOS logic.

2

2

VCC

Primary supply input, +5V

3

3

GND

IC ground pin, 0V reference

4

4

PFI

Power Fail Input. Internally connected to the power fail comparator which

is referenced to 1.25V. The Power Fail Output (/PFO) remains high if PFI

comparator is not used.

5

5

/PFO

Power Fail Output. The power fail comparator is independent of all other

function on this device.

6

N/A

WDI

Watch Dog Input. The WDI input monitors microprcessor activity, an internal

watchdog timer resets itself with each transition on the watchdog input. If the

WDIpin is held high or low for longer than the watchog timeout period, /WDO

is forced to active low. the watchdog function can be diabled by floating the

WDI pin.

N/A

6

N/C

Not Internally Connected

7

7

/RESET

by low signal on the manual reset input (/MR). /RESET remains asserted for

age or after the manual reset pin transition from low to high. The watchdog

timer will not assert /RESET unless /WDO is connected to /MR

8

N/A

/WDO

Output for the Watchdog Timer. The watchdog timer resets itself with each

transition o the watchdog input. If the WDI pin is held high or low for longer

than the watchdog timeout period, /WDO is forced low. /WDO will also be

N/A

8

RESET

low the reset threshold voltage or by a low signal on the manual reset input

(/MR). RESET is suitable for microprocessor systems that use active high

reset.