ACT8342

Rev 3, 11-Sep-09

- 4 -

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Copyright © 2008 Active-Semi, Inc.

PIN DESCRIPTIONS

PIN

NAME

DESCRIPTION

1

nIRQ

Open-Drain Push-Button Status Output. nIRQ is an open-drain output which sinks current when

nMSTR is asserted or when a fault-condition occurs. If interrupts are not masked.

2

nMSTR Master Enable Input. Drive nMSTR to GA or to a logic low to enable the IC.

3

nRSTO

Open-Drain Reset Output. nRSTO asserts low for the reset timeout period of 300ms whenever the

IC is enabled.

4

OUT1

Output Feedback Sense. For fixed output voltage options REG1, connect this pin directly to the

output node to connect the internal feedback network to the output voltage. For adjustable output

voltage Options REG1. The voltage at this pin is regulated to 0.625V. Connect this pin to the

center point of the output voltage feedback network between Output Node and GA to set the

output voltage.

5

VP1

Power Input for REG1. Bypass to GP1 with a high quality ceramic capacitor placed as close as

possible to the IC.

6

SW1

Switching node Output for REG1. Connect this pin to the switching end of the inductor.

7

GP1

Power Ground for REG1. Connect GA, GP1 together at a single point as close to the IC as

possible.

8

OUT2

Output voltage for REG2. Capable of delivering up to 80mA of output current. Output is discharged

to ground with 650Ω resistor when disabled.

9

INL

Power input for REG2, REG3. Bypass to GA with a high quality ceramic capacitor placed as close

as possible to the IC.

10

OUT3

Output voltage for REG3. Capable of delivering up to 150mA of output current. Output is

discharged to ground with 650Ω resistor when disabled.

11

ON2

Enable Control Input for REG2. Drive ON2 to INL or to a logic high for normal operation, drive to

GA or a logic low to disable REG2.

12

ON1

Enable control input for REG1. Drive ON1 to the VP1 or a logic high for normal operation, drive to

GA or a logic low to disable REG1.

13

REFBP

Reference Noise Bypass. Connect a 0.01µF ceramic capacitor from REFBP to GA. This pin is

discharged to GA in shutdown.

14, 16

GA

Analog Ground. Connect GA directly to a quiet ground node. Connect GA, GP1 together at a

single point as close to the IC as possible.

15

ON3

Enable control input for REG3. Drive ON3 to the INL or a logic high for normal operation, drive to

GA or a logic low to disable REG3.