LA74308LP

No.A0898-5/16

POWER ON RESET Condition (SERIAL communication)

The POWER ON RESET state covers a period up to the rise

of the second C.S. input after fall

of POWER ON

PULSE

generated inside IC when the power is supplied and the STANDBY control is canceled.

is the dummy

communication.

Actually, because of delay of several hundreds ns in the IC, the first DATA condition begins in

and the normal

SERIAL communication condition begins after

.

HIGH period for about 2ms

Delay of several

hundreds ns

SERIAL communication

condition

(First DATA hold)

(First C.S.)

Dummy communication

Power Supply

H

L

STANDBY control

(Pin 3)

HIGH to cancel STANDBY

H

L

POWER ON PULSE

(Signal inside IC)

H

L

C.S.

(Pin 6)

H

L

H

L

POWER ON RESET

(IC inside)

POWER ON RESET (default) state

Data

(Pin 8)

H

L

Clock

(Pin 7)

H

L

Dummy Data

First Data

(Second C.S.)

First DATA communication